PERC
This is the Programmable Electrical Rules Checking repository.
Key Points
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1. Pins are either power connections or belong to a uniquely-annotated symbol, so they don't need a path if they are driving the subgraph.
2. PT_POWER_IN, ///< power input (GND, VCC for ICs). Must be connected to a power output.
3. PT_POWER_OUT, ///< output of a regulator: intended to be connected to power input pins
4. Using PWR_FLAG to tell ERC that the power input is intended to be connected to a regulator.
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1. Connected component
Each net is a
connected component>).
https://github.com/bloominstituteoftechnology/Graphs.git
References
https://www.synopsys.com/glossary/what-is-programmable-electrical-rules-checking.html
https://www.allaboutcircuits.com/industry-articles/importance-of-advanced-erc-circuit-design
https://aniah.fr
https://semiconwiki.com/advanced-reliability-verification-mentors-calibre-perc/
https://semiwiki.com/eda/2296-a-programmable-electrical-rule-checker/
https://resources.pcb.cadence.com/blog/2023-electrical-rule-check
https://eda.sw.siemens.com/en-US/ic/calibre-design/reliability-verification/perc/
https://resources.pcb.cadence.com/blog/2023-electrical-rule-check
https://zhuanlan.zhihu.com/p/674943393